Analog Filter Design by M.E. Van Valkenburg

By M.E. Van Valkenburg

This vintage used to be the 1st to fill the necessity for an undergraduate textual content in analog filters for electric engineering. meant for juniors and seniors with a historical past in introductory circuits, together with Laplace transforms, the textual content specializes in inductorless filters within which the lively aspect is the operational amplifier (op-amp). Passive LCR filters are excluded other than as prototypes from which an energetic similar is then came upon. scholars examine the significance of op-amps to analog structures, which Van Valkenburg equates with the importance of the microprocessor to electronic platforms. as the e-book is inteded for undergraduates, refined arithmetic has been refrained from at any place attainable in prefer of algebraic derivations. layout issues require at so much a handheld calculator.

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The symmetrical voltages at the fault location (V1, V2 and V0) are supplied to a simple 012 ! ABC converter and displayed for comparison with the voltages in the original threephase model. Also, the fault currents from the original system and from the symmetrical networks are displayed. This selection is shown in Fig. 21. Note that there is a block named “Display abc and 012 phasors”. This display shows, at the end of the simulation, the phasors in abc domain with both magnitudes and phases, as shown in Fig.

The equivalent circuits for positive and negative sequences are directly taken from [1], and they can be seen in Fig. 40. It should be noted that, the system shown in Fig. 39 contains a three-phase balanced source. Thus, the negative sequence equivalent circuit does not contain any voltage source. However, in the case of unbalanced situations, the negative sequence equivalent circuit has also a nonzero voltage source. In the representation of these equivalent circuits in Simulink, the shunt resistances (iron losses) are neglected.

8 Positive sequence network Fig. 9 Negative sequence network If we do the same for the zero sequence case, we have V 0a ¼ V 0b ¼ V 0c . Applying Kirchoff Current Law (KCL) at the node n ( I 0a þ I 0b þ I 0c ¼ 0 ), we get I 0a ¼ I 0b ¼ I 0c ¼ 0. This means that there is no zero-sequence current flowing in the network. As all the zero-sequence voltages and currents are equal, the circuit can be represented with only one phase as shown in Fig. 10. This is the zero sequence network. Note that Zg is multiplied by three in that network.

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