By Samantha Yoder
This publication introduces the concept that of voltage-controlled-oscillator (V.C.O.)-based analog-to-digital converters (A.D.C.s). exact clarification is given of this promising new classification of excessive answer and coffee strength A.D.C.s, which use time quantization rather than conventional analog-based (i.e. voltage) A.D.C.s.
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Additional info for VCO-Based Quantizers Using Frequency-to-Digital and Time-to-Digital Converters
All the nonidealities are modeled and the results are shown in Figs. 19 for the FDC and TDC, respectively. As shown, the first-order noise shaping of the FDC is destroyed. The nonlinearity of the VCO tuning curve is the bottleneck to achieving high SNR and dominates over the other nonidealities in both quantizers. 1. The theoretical and modeled SNR with nonidealities is shown. The theoretical values closely match the modeled values and have been confirmed with multiple simulations. References 1.
Requirements of a large tuning range may also lead to higher VCO phase noise and tuning nonlinearity . 1) There is also a requirement to have a zero dc offset at the FDC output . This means that there are an equal number of 1’s and 0’s when the VCO frequency is operating at its free running center frequency. For this to occur, the center frequency must be 4Â smaller than the sampling frequency. This becomes important when the VCO-ADC is used in a DS modulator. S. 1007/978-1-4419-9722-7_4, # Springer Science+Business Media, LLC 2011 51 52 4 Further Analyses: FDC vs.
10 . 2 VCO Phase Noise Fig. 8 VCO phase noise: VerilogA model vs. simulated SpectreRF Fig. 9 Modeling 1/f 3 region of phase noise using a filter 39 40 3 Limitations of the VCO-Based Quantizer Fig. 10 Simulated SpectreRF phase noise transfer function H( f ) is derived through the following derivations. 23). 24). 24) Following the block diagram in Fig. 25), where the filtered jitter is denoted as Dtc. 25) Following Fig. 26). 2 VCO Phase Noise 41 Fig. 27). 28). 28) and Fig. 22). The jitter filter is shown in Fig.